noinit Segment to Be Placed in External Memory. To do this, the CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY needs to be enabled. The values placed into this section will not be initialized at startup and should keep its value after software restart.īy applying the EXT_RAM_NOINIT_ATTR macro, non-initialized value could also be placed in external RAM. The macro _NOINIT_ATTR can be used as attribute to place data into. The remaining 160 KB (for a total of 320 KB of DRAM) can only be allocated at runtime as heap.Ĭonstant data may also be placed into DRAM, for example if it is used in an non-flash-safe ISR (see explanation under How to Place Code in IRAM). However, due to a technical limitation, the maximum statically allocated DRAM usage is 160 KB. There is 520 KB of available SRAM (320 KB of DRAM and 200 KB of IRAM) on the ESP32. Due to some memory fragmentation issues caused by ROM, it is also not possible to use all available DRAM for static allocations - however the remaining DRAM is still available as heap at runtime. Length of this region is also reduced by 16 KB or 32 KB if trace memory is used. The available size of the internal DRAM region is reduced by 64 KB (by shifting start address to 0x3FFC0000) if Bluetooth stack is used. bss Segment to Be Placed in External Memory. To use this macro, the CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY needs to be enabled. The remaining space in this region is used for the runtime heap.īy applying the EXT_RAM_BSS_ATTR macro, zero-initialized data can also be placed into external RAM. Non-constant static data (.data) and zero-initialized data (.bss) is placed by the linker into Internal SRAM as data memory. For more information about the different memory buses consult the ESP32 Technical Reference Manual > System and Memory. Data memory is not executable and can be accessed via individual byte operations. Instruction memory is executable, and can only be read or written via 4-byte aligned words. This section describes how ESP-IDF uses these features by default.ĮSP-IDF distinguishes between instruction memory bus (IRAM, IROM, RTC FAST memory) and data memory bus (DRAM, DROM). ESP32 chip has multiple memory types and flexible memory mapping features.
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